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arm64: dts: qcom: Add USB changes for Shikra #917

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Merged
Komal-Bajaj merged 1 commit into from
Apr 13, 2026
+184 −0
Merged

arm64: dts: qcom: Add USB changes for Shikra #917

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21 changes: 21 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -59,3 +59,24 @@
&uart0 {
status = "okay";
};

&usb_1 {
dr_mode = "peripheral";

status = "okay";
};

&usb_1_hsphy {
vdd-supply = <&pm4125_l12>;
vdda-pll-supply = <&pm4125_l13>;
vdda-phy-dpdm-supply = <&pm4125_l21>;

status = "okay";
};

&usb_qmpphy {
vdda-phy-supply = <&pm4125_l8>;
vdda-pll-supply = <&pm4125_l13>;

status = "okay";
};
21 changes: 21 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -59,3 +59,24 @@
&uart0 {
status = "okay";
};

&usb_1 {
dr_mode = "peripheral";

status = "okay";
};

&usb_1_hsphy {
vdd-supply = <&pm4125_l12>;
vdda-pll-supply = <&pm4125_l13>;
vdda-phy-dpdm-supply = <&pm4125_l21>;

status = "okay";
};

&usb_qmpphy {
vdda-phy-supply = <&pm4125_l8>;
vdda-pll-supply = <&pm4125_l13>;

status = "okay";
};
142 changes: 142 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -488,6 +488,70 @@
#power-domain-cells = <1>;
};

usb_1_hsphy: phy@1613000 {
compatible = "qcom,shikra-qusb2-phy";
reg = <0x0 0x01613000 0x0 0x180>;

clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "cfg_ahb", "ref";

resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
nvmem-cells = <&qusb2_hstx_trim_1>;
#phy-cells = <0>;

status = "disabled";
};

usb_qmpphy: phy@1615000 {
compatible = "qcom,shikra-qmp-usb3-phy";
reg = <0x0 0x01615000 0x0 0x1000>;

clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_EN>,
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
clock-names = "cfg_ahb",
"ref",
"com_aux",
"pipe";

resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
<&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
reset-names = "phy",
"phy_phy";

#clock-cells = <0>;
clock-output-names = "usb3_phy_pipe_clk_src";

#phy-cells = <0>;
orientation-switch;

qcom,tcsr-reg = <&tcsr_regs 0xb244>;

status = "disabled";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;

usb_qmpphy_out: endpoint {
};
};

port@1 {
reg = <1>;

usb_qmpphy_usb_ss_in: endpoint {
remote-endpoint = <&usb_1_dwc3_ss>;
};
};
};
};

system_noc: interconnect@1880000 {
compatible = "qcom,shikra-sys-noc";
reg = <0x0 0x01880000 0x0 0x6a080>;
Expand Down Expand Up @@ -534,6 +598,11 @@
#address-cells = <1>;
#size-cells = <1>;

qusb2_hstx_trim_1: hstx-trim@258 {
reg = <0x25b 0x1>;
bits = <1 4>;
};

gpu_speed_bin: gpu-speed-bin@6006 {
reg = <0x6006 0x2>;
bits = <5 8>;
Expand Down Expand Up @@ -689,6 +758,79 @@
};
};

usb_1: usb@4e00000 {
compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
reg = <0x0 0x04e00000 0x0 0xfc100>;

clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_EN>;
clock-names = "cfg_noc",
"core",
"iface",
"sleep",
"mock_utmi",
"xo";

assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
assigned-clock-rates = <19200000>, <133333333>;

interrupts-extended = <&intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dwc_usb3",
"pwr_event",
"qusb2_phy",
"ss_phy_irq";

iommus = <&apps_smmu 0x120 0x0>;

phys = <&usb_1_hsphy>, <&usb_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";

power-domains = <&gcc GCC_USB30_PRIM_GDSC>;

resets = <&gcc GCC_USB30_PRIM_BCR>;

snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
snps,parkmode-disable-ss-quirk;

usb-role-switch;

wakeup-source;

status = "disabled";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;

usb_1_dwc3_hs: endpoint {
};
};

port@1 {
reg = <1>;

usb_1_dwc3_ss: endpoint {
remote-endpoint = <&usb_qmpphy_usb_ss_in>;
};
};
};
};

adreno_smmu: iommu@59a0000 {
compatible = "qcom,shikra-smmu-500", "qcom,smmu-500", "arm,mmu-500";
reg = <0x0 0x059a0000 0x0 0x10000>;
Expand Down