lib/group_cpus: make group CPU cluster aware #479
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As CPU core counts increase, the number of NVMe IRQs may be smaller than
the total number of CPUs. This forces multiple CPUs to share the same
IRQ. If the IRQ affinity and the CPU’s cluster do not align, a
performance penalty can be observed on some platforms.
This patch improves IRQ affinity by grouping CPUs by cluster within each
NUMA domain, ensuring better locality between CPUs and their assigned
NVMe IRQs.
Details:
Intel Xeon E platform packs 4 CPU cores as 1 module (cluster) and share
the L2 cache. Let's say, if there are 40 CPUs in 1 NUMA domain and 11
IRQs to dispatch. The existing algorithm will map first 7 IRQs each with
4 CPUs and remained 4 IRQs each with 3 CPUs. The last 4 IRQs may
have cross cluster issue. For example, the 9th IRQ which pinned to
CPU32, then for CPU31, it will have cross L2 memory access.
CPU |28 29 30 31|32 33 34 35|36 ...
-------- -------- --------
IRQ 8 9 10
If this patch applied, then first 2 IRQs each mapped with 2 CPUs and
rest 9 IRQs each mapped with 4 CPUs, which avoids the cross cluster
memory access.
CPU |00 01 02 03|04 05 06 07|08 09 10 11| ...
----- ----- ----------- -----------
IRQ 1 2 3 4
As a result, 15%+ performance difference is observed in FIO
libaio/randread/bs=8k.
Changes since V1:
- Add more performance details in commit messages.
- Fix endless loop when topology_cluster_cpumask return invalid mask.
History:
v1: https://lore.kernel.org/all/[email protected]/
v1 [RESEND]: https://lore.kernel.org/all/[email protected]/
Reviewed-by: Tianyou Li <[email protected]>
Reviewed-by: Tim Chen <[email protected]>
Tested-by: Dan Liang <[email protected]>
Signed-off-by: Wangyang Guo <[email protected]>
Author
|
Upstream branch: 623fb99 |
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Pull request for series with
subject: lib/group_cpus: make group CPU cluster aware
version: 2
url: https://patchwork.kernel.org/project/linux-block/list/?series=1041509