Introduce basic Verilator support #48
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Running on Verilator may or may not give tenyr an obvous immediate advantage, but given how quickly its generated C++ code can run, it may be a reasonable way to introduce a cycle-accurate simulator alternative to the (time-agnostic) functional simulator that is
tsim.The current pull request will introduce basic "Verilated" functionality only.
Demo (stops correctly after executing ~112469 cycles).
make -C ex qsort_demo.memh cp ex/qsort_demo.memh hw/verilator/default.memh cd hw/verilator make ./Vtop