[feat]: OpenRISC gcc port and boards support

[madhu2000u]

This is the starting effort to port OpenRISC GCC to Embench. Initial required configurations have been added and tested.

[simonpcook]

I think it would be good to have more examples to show additional breadth, so if this is a good enough port this should be merged. Thoughts @jeremybennett ?

[jeremybennett]

@madhu2000u Good starting point for OpenRISC support. I think this will allow you to build the benchmarks. Are you able to run either benchmark_size.py or benchmark_speed.py to validate the build? If either of these is working, then please add the details to the README.md and we can merge it as the starting point for OpenRISC.

[madhu2000u]

Thank you @simonpcook and @jeremybennett. Yes, I have tested the benchmark_size.py and it is working and displaying all the absolute and relative results for OpenRISC. I believe you are talking about doc/README.md right? Could you guide me on where and what details to update it with?

Thank you.