Fixed to pass with verilator --lint-only.#282
Conversation
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Hi @ryos36 do you have the same issue with the latest update to the repo? |
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Hi, I used 9e1a493, it seems same issue. |
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Can you please post the error? Also, it is intentional that the example is a 16 bit counter not a 32 bit counter. |
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sorry late reply. |
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you can check use verilator like as followings. $ verilator --lint-only -Wall --Wno-DECLFILENAME --top-module user_proj_example -I /foss/pdks/sky130B/libs.ref/sky130_fd_sc_hd/verilog/primitives.v -I /foss/pdks/sky130B/libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v /foss/designs/caravel_user_project/openlane/user_proj_example/../../verilog/rtl/defines.v /foss/designs/caravel_user_project/openlane/user_proj_example/../../verilog/rtl/user_proj_example.v -Wno-fatal --relative-includes |
When I ran flow.tcl on openLane 2023.05, an error occurred in STEP 1. In my opinion, there are a few things that should be fixed, which I propose in this pull request.