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Add vector shift/rotate opcode support on IBM Z platform#8120

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ehsankianifar:Z_vectorShiftAndRotateOpcodes
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Add vector shift/rotate opcode support on IBM Z platform#8120
ehsankianifar wants to merge 1 commit intoeclipse-omr:masterfrom
ehsankianifar:Z_vectorShiftAndRotateOpcodes

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@ehsankianifar
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Introduce support for vector shift and rotate operations in the IBM Z code generator, including masked forms. When a mask is present, the operation is applied only to lanes enabled by the mask. Unmasked lanes preserve their source values to align with vector API semantics.

@ehsankianifar
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@r30shah @hzongaro @gita-omr Please review this PR at your convenience. Thanks.

@hzongaro hzongaro self-assigned this Feb 9, 2026
@hzongaro hzongaro self-requested a review February 9, 2026 17:24
generateVRRcInstruction(cg, TR::InstOpCode::VN, node, targetReg, sourceReg2, cg->evaluate(maskChild),
0, 0, 0);
cg->decReferenceCount(maskChild);
isMasked = FALSE;
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I think it would aid readability if you explained why isMasked is being set to false here.

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I added a comment as you suggested.

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hzongaro commented Feb 9, 2026

This isn't a comment on this pull request itself, but rather a question about the semantics of the shift and rotate vector operations themselves, and the scalar shift and rotate operations.

The OMR TR::sushr opcode, for instance, operates on a TR::Int16 value and a TR::Int32 shift amount. So given IL like the following,

n99n sushr
n97n   sconst -1
n98n   iconst 0x1F9

how many bits of the second operand are taken into consideration in the operation? Are all thirty-two bits taken into account, which means this would yield a result of zero? Or is the shift amount masked to yield a value in the range 0-15, which would give a shift amount of nine and the result of this operation would be 127?

Reading the descriptions of the z/Architecture VESLV, et al. opcodes, the shift amount seems to be taken modulo the number of bits in the element size, so for an equivalent example using vector operands, the shift amount would be masked to yield a value in the range 0-15, so a shift amount of nine, if I am understanding correctly. That seems to agree with the incubator Java Vector API, again, if I understand correctly.

I think the descriptions of vshl, vshr, vushr and vrol need to clearly specify how the shift/rotate amount is interpreted for the different element sizes, and similarly for the scalar shift and rotate operations.

@gita-omr, @0xdaryl - FYI

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This isn't a comment on this pull request itself, but rather a question about the semantics of the shift and rotate vector operations themselves, and the scalar shift and rotate operations.

Thanks @hzongaro for your comment. As you mentioned, shifting by modulo of the specified value agrees with the Java Vector API (https://docs.oracle.com/en/java/javase/25/docs/api/jdk.incubator.vector/jdk/incubator/vector/VectorOperators.html#LSHL)
Maybe we can suffix the vector IL opcodes with something like Modulo to make a distinction.

@ehsankianifar ehsankianifar force-pushed the Z_vectorShiftAndRotateOpcodes branch from 378a29e to d5151ef Compare February 10, 2026 14:57
Introduce support for vector shift and rotate operations in the IBM Z
code generator, including masked forms. When a mask is present, the
operation is applied only to lanes enabled by the mask. Unmasked lanes
preserve their source values to align with vector API semantics.

signed-off-by: Ehsan Kiani Far <ehsan.kianifar@gmail.com>
@ehsankianifar ehsankianifar force-pushed the Z_vectorShiftAndRotateOpcodes branch from d5151ef to 0beb49f Compare February 10, 2026 14:59
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