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JIT: Fix GC info for fast tailcalls with contained targets #122924

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Merged
jakobbotsch merged 1 commit into from
Jan 9, 2026
Merged

JIT: Fix GC info for fast tailcalls with contained targets #122924

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4 changes: 2 additions & 2 deletions src/coreclr/jit/codegenlinear.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -538,11 +538,11 @@ void CodeGen::genCodeForBBlist()
nonVarPtrRegs &= ~RBM_ASYNC_CONTINUATION_RET;
}

// For a tailcall arbitrary argument registers may be live into the
// For a tailcall arbitrary argument/target registers may be live into the
// epilog. Skip validating those.
if (block->HasFlag(BBF_HAS_JMP))
{
nonVarPtrRegs &= ~fullIntArgRegMask(CorInfoCallConvExtension::Managed);
nonVarPtrRegs = RBM_NONE;
}

if (nonVarPtrRegs)
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15 changes: 15 additions & 0 deletions src/coreclr/jit/codegenxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6052,6 +6052,21 @@ void CodeGen::genCall(GenTreeCall* call)
if (target->isContainedIndir())
{
genConsumeAddress(target->AsIndir()->Addr());

// Consuming these registers will ensure the registers containing the state we need are available here,
// but it assumes we will use them immediately and will thus kill the live state. Since these registers
// are live into the epilog we need to remark them as live.
// This logic is similar to what genCallPlaceRegArgs does above for argument registers.
GenTreeIndir* indir = target->AsIndir();
if (indir->HasBase() && indir->Base()->TypeIs(TYP_BYREF, TYP_REF))
{
gcInfo.gcMarkRegPtrVal(indir->Base()->GetRegNum(), indir->Base()->TypeGet());
}

if (indir->HasIndex() && indir->Index()->TypeIs(TYP_BYREF, TYP_REF))
{
gcInfo.gcMarkRegPtrVal(indir->Index()->GetRegNum(), indir->Index()->TypeGet());
}
}
else
{
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