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@akkako akkako commented Dec 6, 2025

optimize gpio simulate swd timing, has been verified on hardware.
probe-rs benchmark test max speed increase from ~330kB/s to ~350kB/s.

Summary by CodeRabbit

  • New Features
    • Added a hardware isolation mode that updates the device name and status reporting when enabled.
  • Bug Fixes
    • Improved debug interface and JTAG/SWD pin-direction handling for more reliable operation.
    • Adjusted transfer behavior in isolated mode to enhance communication stability and compatibility.

✏️ Tip: You can customize this high-level summary in your review settings.

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coderabbitai bot commented Dec 6, 2025

Walkthrough

Introduces new pin macros (PIN_TCK_SLV, PIN_TMS_IN), shifts SWD/SWDIO direction control to a dedicated GPIO (SWDIO_DIR), adds HSLINK_ISOLATE build-time branching, and conditionally alters SPI/SWD transfer formats and pin initialization across SWD/JTAG subsystems.

Changes

Cohort / File(s) Summary
DAP config and pin macros
projects/HSLink-Pro/src/DAP_config.h
Added PIN_TCK_SLV and PIN_TMS_IN. Reworked PORT_OFF and multiple PIN_* macros to use new pins and bitwise masking (bit & 0x01) and to route reads/writes through PIN_TMS_IN when HSLINK_ISOLATE is enabled.
Build configuration
projects/HSLink-Pro/src/CMakeLists.txt
Added CONFIG_HARDWARE_ISOLATED branch to set APP_NAME and define HSLINK_ISOLATE (0/1) at configure time for isolated vs. pro builds.
HID descriptor/identification
projects/HSLink-Pro/src/HID_COMM/hid_comm.cpp
Hello() now reports model string conditionally as "HSLink-Iso" when HSLINK_ISOLATE is defined, otherwise "HSLink-Pro".
JTAG direction control and pin setup
projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_IO.c, projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_SPI.c
Introduced SWDIO_DIR as a GPIO-based direction pin; moved PAD_CTL and FUNC_CTL usages from PIN_TDO to SWDIO_DIR. Configures SWDIO_DIR as GPIO (FUNC_CTL=0) in both IO and SPI setup paths and initializes its output state for JTAG mode.
SWD IO and SPI conditional behavior
projects/HSLink-Pro/src/SW_DP/SW_DP_IO.c, projects/HSLink-Pro/src/SW_DP/SW_DP_SPI.c
Added PIN_TMS_IN and SWDIO_DIR initializations; introduced #if HSLINK_ISOLATE conditional blocks that (1) initialize PIN_TMS_IN when isolated, (2) change TRANSFMT/SPI transfer formats and MOSI bidirectionality depending on isolation, and (3) toggle SWD emulation mosi_bidir.

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~25 minutes

  • Inspect DAP_config.h macro changes for correct pad/function mappings and that bit masks equal previous behavior.
  • Validate SWDIO_DIR and PIN_TMS_IN PAD_CTL/FUNC_CTL usage across JTAG/SW setup sequences.
  • Review conditional TRANSFMT values and mosi_bidir toggling in SW_DP_SPI.c for correctness across read/write paths.

Possibly related PRs

Poem

🐰 I nibble at pads and hop with glee,

New pins arranged — PIN_TCK and TMS_IN for me.
SWDIO_DIR guards the sideways stream,
Iso or Pro — the firmware dreams.
Hops of code, a tiny rabbit beam.

Pre-merge checks and finishing touches

❌ Failed checks (1 warning)
Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 52.94% which is insufficient. The required threshold is 80.00%. You can run @coderabbitai generate docstrings to improve docstring coverage.
✅ Passed checks (2 passed)
Check name Status Explanation
Description Check ✅ Passed Check skipped - CodeRabbit’s high-level summary is enabled.
Title check ✅ Passed The PR title 'hslink: gpio mode swd timing optimize' accurately describes the main objective—optimizing GPIO-simulated SWD timing—and is supported by the extensive changes across DAP_config.h, JTAG_DP_IO.c, SW_DP_IO.c, SW_DP_SPI.c, and other files that refactor pin control and SPI transfer formatting.
✨ Finishing touches
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🧪 Generate unit tests (beta)
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  • Post copyable unit tests in a comment

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@kaidegit kaidegit requested a review from RCSN December 6, 2025 08:02
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kaidegit commented Dec 6, 2025

LGTM

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Actionable comments posted: 0

🧹 Nitpick comments (1)
projects/HSLink-Pro/src/SW_DP/SW_DP_SPI.c (1)

240-244: Consider extracting magic numbers for TRANSFMT values.

The TRANSFMT register values (0x1F18, 0x1F08, 0x0018, 0x0008) are repeated 7 times throughout the transfer logic. While the conditional compilation is correct, defining these as named constants would improve maintainability and make the bit field meanings clearer (datalen, mosibidir, lsb).

Example refactor:

+#if HSLINK_ISOLATE
+#define SPI_TRANSFMT_32BIT_LSB  0x1F08  /* datalen=32bit, mosibidir=0, lsb=1 */
+#define SPI_TRANSFMT_1BIT_LSB   0x0008  /* datalen=1bit, mosibidir=0, lsb=1 */
+#else
+#define SPI_TRANSFMT_32BIT_LSB  0x1F18  /* datalen=32bit, mosibidir=1, lsb=1 */
+#define SPI_TRANSFMT_1BIT_LSB   0x0018  /* datalen=1bit, mosibidir=1, lsb=1 */
+#endif

Then replace inline values with the constants.

Also applies to: 262-266, 287-291, 310-314, 334-338, 353-357, 370-374

📜 Review details

Configuration used: CodeRabbit UI

Review profile: CHILL

Plan: Pro

📥 Commits

Reviewing files that changed from the base of the PR and between 9765765 and 8288fb3.

📒 Files selected for processing (7)
  • projects/HSLink-Pro/src/CMakeLists.txt (2 hunks)
  • projects/HSLink-Pro/src/DAP_config.h (11 hunks)
  • projects/HSLink-Pro/src/HID_COMM/hid_comm.cpp (1 hunks)
  • projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_IO.c (2 hunks)
  • projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_SPI.c (1 hunks)
  • projects/HSLink-Pro/src/SW_DP/SW_DP_IO.c (1 hunks)
  • projects/HSLink-Pro/src/SW_DP/SW_DP_SPI.c (9 hunks)
🔇 Additional comments (13)
projects/HSLink-Pro/src/CMakeLists.txt (2)

6-10: LGTM!

Clean conditional configuration for selecting the isolated hardware variant at build time.


40-44: LGTM!

The HSLINK_ISOLATE macro enables conditional compilation paths across the codebase for the isolated hardware variant.

projects/HSLink-Pro/src/HID_COMM/hid_comm.cpp (1)

137-141: LGTM!

The conditional model string correctly reflects the build configuration (HSLink-Iso vs HSLink-Pro).

projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_SPI.c (1)

78-78: LGTM!

The SWDIO_DIR pad configuration is consistent with other GPIO pin initializations in this setup function.

projects/HSLink-Pro/src/SW_DP/SW_DP_IO.c (1)

90-91: LGTM!

The new pin configurations (PIN_TMS_IN as input, SWDIO_DIR for direction control) follow the existing GPIO initialization pattern and align with the isolation mode enhancements.

Also applies to: 96-96

projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_IO.c (1)

269-269: LGTM!

The shift to using a dedicated SWDIO_DIR GPIO for direction control (instead of TDO) is well-structured. The pin configurations follow the established pattern, and the initial state (high for JTAG mode) is correctly set.

Also applies to: 274-274, 278-278, 296-296, 300-300, 304-304, 308-308, 315-315

projects/HSLink-Pro/src/SW_DP/SW_DP_SPI.c (2)

45-47: LGTM!

The conditional PIN_TMS_IN pad configuration for isolated mode is correctly guarded and follows the same pattern as other pin setups.


431-435: LGTM!

The conditional mosi_bidir configuration aligns with the TRANSFMT changes throughout the file, correctly disabling bidirectional mode for the isolated variant.

projects/HSLink-Pro/src/DAP_config.h (5)

312-312: LGTM!

The new pin macros (PIN_TCK_SLV and PIN_TMS_IN) are clearly defined and support the isolation mode functionality.

Also applies to: 315-315


392-393: LGTM!

PORT_OFF() correctly handles the new pins (PIN_TMS_IN and PIN_TCK_SLV) by resetting their pad controls and GPIO configurations to high-impedance mode.

Also applies to: 407-411, 421-423


482-486: LGTM!

The conditional pin reads correctly switch between PIN_TMS_IN (isolated mode) and PIN_TMS (non-isolated mode), enabling the proper signal path for each hardware variant.

Also applies to: 514-518


528-528: LGTM!

The bit mask simplifications (& 0x01) correctly ensure only the LSB is written, making the code more explicit and slightly more efficient.

Also applies to: 581-581, 618-618


539-544: LGTM!

The conditional SWDIO output enable/disable logic correctly handles the isolated mode:

  • In isolated mode, SWDIO_DIR alone controls direction
  • In non-isolated mode, additional TMS pin configuration is needed

This aligns with the hardware differences between the two variants.

Also applies to: 554-560

@kaidegit
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kaidegit commented Dec 6, 2025

@akkako 你后面这个提交新开个分支新起个pr吧。。

@akkako
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akkako commented Dec 6, 2025

@akkako 你后面这个提交新开个分支新起个pr吧。。

ok,已经重新开新分支hslink-iso了

@kaidegit kaidegit merged commit d97fec7 into cherry-embedded:master Dec 7, 2025
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2 participants