-
Notifications
You must be signed in to change notification settings - Fork 93
hslink: gpio mode swd timing optimize #72
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
WalkthroughIntroduces new pin macros ( Changes
Estimated code review effort🎯 3 (Moderate) | ⏱️ ~25 minutes
Possibly related PRs
Poem
Pre-merge checks and finishing touches❌ Failed checks (1 warning)
✅ Passed checks (2 passed)
✨ Finishing touches
🧪 Generate unit tests (beta)
Thanks for using CodeRabbit! It's free for OSS, and your support helps us grow. If you like it, consider giving us a shout-out. Comment |
|
LGTM |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Actionable comments posted: 0
🧹 Nitpick comments (1)
projects/HSLink-Pro/src/SW_DP/SW_DP_SPI.c (1)
240-244: Consider extracting magic numbers for TRANSFMT values.The TRANSFMT register values (0x1F18, 0x1F08, 0x0018, 0x0008) are repeated 7 times throughout the transfer logic. While the conditional compilation is correct, defining these as named constants would improve maintainability and make the bit field meanings clearer (datalen, mosibidir, lsb).
Example refactor:
+#if HSLINK_ISOLATE +#define SPI_TRANSFMT_32BIT_LSB 0x1F08 /* datalen=32bit, mosibidir=0, lsb=1 */ +#define SPI_TRANSFMT_1BIT_LSB 0x0008 /* datalen=1bit, mosibidir=0, lsb=1 */ +#else +#define SPI_TRANSFMT_32BIT_LSB 0x1F18 /* datalen=32bit, mosibidir=1, lsb=1 */ +#define SPI_TRANSFMT_1BIT_LSB 0x0018 /* datalen=1bit, mosibidir=1, lsb=1 */ +#endifThen replace inline values with the constants.
Also applies to: 262-266, 287-291, 310-314, 334-338, 353-357, 370-374
📜 Review details
Configuration used: CodeRabbit UI
Review profile: CHILL
Plan: Pro
📒 Files selected for processing (7)
projects/HSLink-Pro/src/CMakeLists.txt(2 hunks)projects/HSLink-Pro/src/DAP_config.h(11 hunks)projects/HSLink-Pro/src/HID_COMM/hid_comm.cpp(1 hunks)projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_IO.c(2 hunks)projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_SPI.c(1 hunks)projects/HSLink-Pro/src/SW_DP/SW_DP_IO.c(1 hunks)projects/HSLink-Pro/src/SW_DP/SW_DP_SPI.c(9 hunks)
🔇 Additional comments (13)
projects/HSLink-Pro/src/CMakeLists.txt (2)
6-10: LGTM!Clean conditional configuration for selecting the isolated hardware variant at build time.
40-44: LGTM!The HSLINK_ISOLATE macro enables conditional compilation paths across the codebase for the isolated hardware variant.
projects/HSLink-Pro/src/HID_COMM/hid_comm.cpp (1)
137-141: LGTM!The conditional model string correctly reflects the build configuration (HSLink-Iso vs HSLink-Pro).
projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_SPI.c (1)
78-78: LGTM!The SWDIO_DIR pad configuration is consistent with other GPIO pin initializations in this setup function.
projects/HSLink-Pro/src/SW_DP/SW_DP_IO.c (1)
90-91: LGTM!The new pin configurations (PIN_TMS_IN as input, SWDIO_DIR for direction control) follow the existing GPIO initialization pattern and align with the isolation mode enhancements.
Also applies to: 96-96
projects/HSLink-Pro/src/JTAG_DP/JTAG_DP_IO.c (1)
269-269: LGTM!The shift to using a dedicated SWDIO_DIR GPIO for direction control (instead of TDO) is well-structured. The pin configurations follow the established pattern, and the initial state (high for JTAG mode) is correctly set.
Also applies to: 274-274, 278-278, 296-296, 300-300, 304-304, 308-308, 315-315
projects/HSLink-Pro/src/SW_DP/SW_DP_SPI.c (2)
45-47: LGTM!The conditional PIN_TMS_IN pad configuration for isolated mode is correctly guarded and follows the same pattern as other pin setups.
431-435: LGTM!The conditional mosi_bidir configuration aligns with the TRANSFMT changes throughout the file, correctly disabling bidirectional mode for the isolated variant.
projects/HSLink-Pro/src/DAP_config.h (5)
312-312: LGTM!The new pin macros (PIN_TCK_SLV and PIN_TMS_IN) are clearly defined and support the isolation mode functionality.
Also applies to: 315-315
392-393: LGTM!PORT_OFF() correctly handles the new pins (PIN_TMS_IN and PIN_TCK_SLV) by resetting their pad controls and GPIO configurations to high-impedance mode.
Also applies to: 407-411, 421-423
482-486: LGTM!The conditional pin reads correctly switch between PIN_TMS_IN (isolated mode) and PIN_TMS (non-isolated mode), enabling the proper signal path for each hardware variant.
Also applies to: 514-518
528-528: LGTM!The bit mask simplifications (& 0x01) correctly ensure only the LSB is written, making the code more explicit and slightly more efficient.
Also applies to: 581-581, 618-618
539-544: LGTM!The conditional SWDIO output enable/disable logic correctly handles the isolated mode:
- In isolated mode, SWDIO_DIR alone controls direction
- In non-isolated mode, additional TMS pin configuration is needed
This aligns with the hardware differences between the two variants.
Also applies to: 554-560
|
@akkako 你后面这个提交新开个分支新起个pr吧。。 |
ok,已经重新开新分支hslink-iso了 |
optimize gpio simulate swd timing, has been verified on hardware.
probe-rs benchmark test max speed increase from ~330kB/s to ~350kB/s.
Summary by CodeRabbit
✏️ Tip: You can customize this high-level summary in your review settings.