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Lint ResultsFound 4 issues on changed lines in 1 file:
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Add SoftDevice-aware targets that adjust flash/RAM memory regions so user applications are linked after the SoftDevice binary. Includes: - SoftDevice profiles for S132 (nRF52832) and S140 (nRF52833, nRF52840) - Chip targets: nrf52832_s132, nrf52833_s140, nrf52840_s140 - Board targets: pca10040_s132, nrf52840_dongle_s140, nrf52840_mdk_s140, microbit_v2_s140 - mergehex tool to combine SoftDevice + app Intel HEX files - Examples for preflashed (app-only) and merged (app+SoftDevice) workflows - Hex output for preflashed SoftDevice examples - nRF5 SDK v17.1.0 dependency for SoftDevice hex files Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Replace the monolithic softdevice.zig with per-variant root files (s112/s113/s122/s132/s140) that compose shared types with variant-parameterized GAP functions. S122's different SVC offset table is handled via comptime lookup, and unavailable functions (encrypt, scan, connect, qos_survey) produce compile errors on variants that lack them. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Add automatic softdevice module wiring so SoftDevice targets get the correct variant (S132/S140) available as microzig.hal.softdevice with no manual import setup. The variant_root field in SoftDeviceProfile is the single source of truth for the target-to-variant mapping. - hal_softdevice.zig: re-exports standard HAL + softdevice import - derive_with_softdevice_memory: creates softdevice-aware HAL - softdevice_init: minimal SoftDevice enable + blinky for PCA10040 - softdevice_beacon: BLE non-connectable beacon for PCA10040 - Fix callconv(.C) → callconv(.c) for Zig 0.15 compatibility Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Add S112, S113, S122 hex files alongside existing S132/S140 in the port's softdevice.files struct. Install all five into zig-out/firmware/ so users can easily find them for flashing. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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| pub const IoCaps = enum(u3) { |
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Suggestion: Rename IoCaps to IO_Caps, it should be more in line with our style guidelines. This automation is not perfect so take it with a grain of salt.
| csrk: [sec_key_len]u8, | ||
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| pub const LescP256Pk = extern struct { |
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Suggestion: Rename LescP256Pk to Lesc_P256_Pk, it should be more in line with our style guidelines. This automation is not perfect so take it with a grain of salt.
| pub const PrivacyMode = Self.PrivacyMode; | ||
| pub const PrivacyParams = Self.PrivacyParams; | ||
| pub const SecKdist = Self.SecKdist; | ||
| pub const IoCaps = Self.IoCaps; |
There was a problem hiding this comment.
Suggestion: Rename IoCaps to IO_Caps, it should be more in line with our style guidelines. This automation is not perfect so take it with a grain of salt.
| pub const EncInfo = Self.EncInfo; | ||
| pub const MasterId = Self.MasterId; | ||
| pub const SignInfo = Self.SignInfo; | ||
| pub const LescP256Pk = Self.LescP256Pk; |
There was a problem hiding this comment.
Suggestion: Rename LescP256Pk to Lesc_P256_Pk, it should be more in line with our style guidelines. This automation is not perfect so take it with a grain of salt.
This is untested, once I see examples correctly running on my local hardware then I'll consider merging