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Description
Is your feature request related to a problem? Please describe.
It is very difficult to diagnose CAN bus issues without verifying that the CAN wiring / network has good signal integrity, and one of the best ways to evaluate signal integrity is via use of data eye pattern. One of the essentials is to be able to trigger a scope so that the CAN waveforms don't look like a jumbled mess due to inconsistent triggering of the scope, when a digital storage scope is put on infinite persistence (to look at the eye pattern) it is essential that a consistent jitter free trigger is available. There are certain tricks to doing this on a CAN bus that probably are not apparent to a lot of folks in FRC, who are probably not aware of looking at the CAN bus at the physical layer, unless they are an EE mentor, or have experience in analyzing signal integrity. Switching to CAN FD is even more problematic, as the frame has a start of frame (SOF) that starts at a slower bit rate, then after the Bit-Rate-Shift part of the frame, switches to a higher bit rate. Trying to trigger the scope at SOF (or EOF) will make it hard to see what is happening at the BRS portion of the frame, which is more likely due to have some signal integrity issues due to the higher bit rate. Scopes that are capable of triggering off of CAN FD are at a minimum $2000, so not every FRC will be able to afford such an expensive piece of test equipment. I don't know if it is possible, but can this feature be put into the systemcore / WPIlib, and testing procedure of the CAN and CAN FD bus using a scope be broadly disseminated throughout the community through WPI? I am working on a solution this year, but it is not ready (and not sure right now if i can ever get it to work, but if it works will be posted on Chief Delphi sometime this year as an open source code and hardware design for all teams to use). I'm thinking this will be a good teaching tool for the students who only know the CAN bus in theory, and if the lights are flashing green, it's OK, and red is bad, but not really at an engineering voltage waveform level--being able to look at a frame bit by bit is a great learning experience for students, but the electronics are all plug and play, so they are more like electricians, and I hope to change this mentality. If this is the wrong place to post this, please forward to the systemcore hardware team. Thanks for your time!
Describe the solution you'd like
A clear and concise description of what you want to happen.
Provide scope trigger capability to systemcore so that the CAN FD buses can be viewed at the frame level at SOF, EOF, and the BRS on an oscilloscope. Provide wide dissemination of how to do this with an inexpensive scope, such as $300 to $400 Rigol or Siglent 4 channel with digital storage and infinite persistence modes.
Describe alternatives you've considered
A clear and concise description of any alternative solutions or features you've considered.
I'm going to use an STM microcontroller with CAN FD transceiver in silent mode to attempt to have it provide an external trigger at the SOF, EOF, and BRS (as stated above, if it works, the solution will be posted on Chief Delphi as an open source project that teams can use). Our team is using the CTRE CANivore, and i'd like them to be able to view a CAN FD frame, and evaluate signal integrity. Right now we are using a <$4 CAN transceiver as external trigger source, and it works pretty good for CAN, but CAN FD is harder, I think due to the BRS and the variable length of the frame between 130 to 160us. Wish me luck!
Additional context
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