If loopback is not connected the system halts

[dnorthcote]

The system will halt on initialisation if the system is not connected in loopback. A kernel interrupt is required to fix the issue.

[miklhh]

Hi @dnorthcote,

Do you have any more information about the system halting without the loopback? We, a small team in Sweden, are trying to revamp this entire project by duplicating the OFDM transmitter and receiver to make use of both outputs and inputs on a single RFSoC 2x2 board. However, we are currently experiencing a complete system halt once the system initializes. The PYNQ Linux image becomes completely unresponsive once the bitstream has loaded and the setup routine starts running. Perhaps we are experiencing the same issue as you are describing here? Would you mind elaborating a bit more on why the system halts if the loopback is not connected?

[miklhh]

Hi again,

Regarding my comment from yesterday, our system no longer halts after enabling the PLL for the second DAC and ADC on the RFSoC board. It was simply a mistake from my end when trying to duplicate the transmitter and receiver.

[dnorthcote]

Hi @miklhh

No problem! The reason the system halts is that the cyclic prefix is only sent on initialisation. Thereafter, data is sent continuously until system reset.

We have plans to fix this issue.

Good to hear that you got everything working,

Thanks,
David.

[FredKellerman]

Hi, I'm having a similar issue: the overlay hangs when loaded. There is no indication of any problem it just will not complete to allow execution of the next cell.

As far as I can tell I do have loopback wired correctly. It is possible my breakout card or something is bad but I doubt it.

This is for the ZCU111 and I used the pip install per the instructions.

[dnorthcote]

Hi @FredKellerman

Can you send me a photograph of your setup? As you can see from the previous post, we are aware of this issue, but it generally shouldn't stop most from running the demonstration. Usually, a notebook kernel reset is performed, and the design will begin to function.

Also, as you mention, this design is likely malfunctioning rather than your breakout card. It is fairly complex, and we will work towards a fix that continuously sends a new cyclic prefix every frame.

Kind regards,
David.

[FredKellerman]

Hi David, Thanks for looking into this again. Just for fun I swapped the coax cable as well and no change. I looked at the vivado design and confirmed the instructions match with the data converters used.

Photo:

[dnorthcote]

Hi Fred,

Thanks for sending this over! You have everything set up correctly.

Occasionally I see better performance for this design when I have an external lowpass filter connected in series between the ADC and DAC. If you were provided one in the box with the ZCU111 development board, can you connect this on the ADC side? The DC-1300MHz filter usually provided in the ZCU111 box would be suitable here to suppress any aliasing that occurs.

I'll continue to think about what may be going wrong here and chat with my colleague about having the design upgraded sooner.

After running the first cell in this notebook, can you also tell me the status of the LEDs marked DS44 and DS45? These are the LMK and LMX status LEDs that indicate if the system has the low-jitter clocks configured correctly.

Thanks,
David.