[CH32] update of UART2 and UART3 GPIO mapping [skip ci]

Author: lyusupov

software/firmware/source/SoftRF/src/platform/CH32.cpp

@@ -81,6 +81,36 @@ static bool CH32_has_spiflash  = false;
 static bool FATFS_is_mounted   = false;
 static bool ADB_is_open        = false;
 
+#ifdef UART_MODULE_ENABLED
+const PinMap PinMap_UART_TX[] = {
+  {PA_9, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PD_5, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_Remap_USART2_ENABLE)},
+  {PD_8, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_Partial1Remap_USART3_ENABLE)},
+  {NC,   NP,     0}
+};
+
+const PinMap PinMap_UART_RX[] = {
+  {PA_10, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PD_6,  USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_Remap_USART2_ENABLE)},
+  {PD_9,  USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_Partial1Remap_USART3_ENABLE)},
+  {NC,    NP,     0}
+};
+
+const PinMap PinMap_UART_RTS[] = {
+  {NC, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,    NP,     0}
+};
+
+const PinMap PinMap_UART_CTS[] = {
+  {NC, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {NC, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {NC, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {NC,    NP,     0}
+};
+#endif
+
 HardwareSerial Serial2(USART2);
 HardwareSerial Serial3(USART3);