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Merge pull request #3430 from xlsynth:meheff/2025-11-07-vast-macro
PiperOrigin-RevId: 849156624
2 parents 91e5450 + 65a5936 commit 7a58ea1

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8 files changed

+332
-65
lines changed

8 files changed

+332
-65
lines changed

‎xls/codegen/module_builder.cc‎

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -439,9 +439,8 @@ absl::StatusOr<LogicRef*> ModuleBuilder::AddInputPort(
439439
if (sv_type && options_.emit_sv_types()) {
440440
XLS_ASSIGN_OR_RETURN(
441441
LogicRef * port,
442-
module_->AddInput(
443-
name, file_->ExternType(raw_bits_type, *sv_type, SourceInfo()),
444-
loc ? loc.value() : SourceInfo()));
442+
module_->AddInput(name, file_->ExternType(*sv_type, SourceInfo()),
443+
loc ? loc.value() : SourceInfo()));
445444
if (!sv_type.has_value()) {
446445
return port;
447446
}
@@ -485,8 +484,7 @@ absl::Status ModuleBuilder::AddOutputPort(
485484
}
486485
XLS_ASSIGN_OR_RETURN(
487486
output_port,
488-
module_->AddOutput(name,
489-
file_->ExternType(bits_type, *sv_type, SourceInfo()),
487+
module_->AddOutput(name, file_->ExternType(*sv_type, SourceInfo()),
490488
SourceInfo()));
491489
} else {
492490
XLS_ASSIGN_OR_RETURN(output_port,
@@ -524,8 +522,7 @@ absl::Status ModuleBuilder::AddOutputPort(
524522
if (sv_type && options_.emit_sv_types()) {
525523
XLS_ASSIGN_OR_RETURN(
526524
output_port,
527-
module_->AddOutput(name,
528-
file_->ExternType(bits_type, *sv_type, SourceInfo()),
525+
module_->AddOutput(name, file_->ExternType(*sv_type, SourceInfo()),
529526
SourceInfo()));
530527
} else {
531528
XLS_ASSIGN_OR_RETURN(output_port,

‎xls/codegen/vast/vast.cc‎

Lines changed: 15 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -460,6 +460,13 @@ std::string MacroRef::Emit(LineInfo* line_info) const {
460460
LineInfoStart(line_info, this);
461461
LineInfoIncrease(line_info, NumberOfNewlines(name_));
462462
LineInfoEnd(line_info, this);
463+
if (args_.has_value()) {
464+
std::string args_str = absl::StrJoin(
465+
args_.value(), ", ", [=](std::string* out, Expression* e) {
466+
absl::StrAppend(out, e->Emit(line_info));
467+
});
468+
return absl::StrCat("`", name_, "(", args_str, ")");
469+
}
463470
return absl::StrCat("`", name_);
464471
}
465472

@@ -470,9 +477,9 @@ std::string Include::Emit(LineInfo* line_info) const {
470477
return absl::StrFormat("`include \"%s\"", path_);
471478
}
472479

473-
DataType* VerilogFile::ExternType(DataType* punable_type, std::string_view name,
480+
DataType* VerilogFile::ExternType(std::string_view name,
474481
const SourceInfo& loc) {
475-
return Make<verilog::ExternType>(loc, punable_type, name);
482+
return Make<verilog::ExternType>(loc, name);
476483
}
477484

478485
BitVectorType* VerilogFile::BitVectorTypeNoScalar(int64_t bit_count,
@@ -1763,14 +1770,12 @@ std::string TypedefType::Emit(LineInfo* line_info) const {
17631770

17641771
std::string ExternType::Emit(LineInfo* line_info) const {
17651772
LineInfoStart(line_info, this);
1766-
std::string result = name_;
1767-
LineInfoEnd(line_info, this);
1768-
return result;
1769-
}
1770-
1771-
std::string ExternPackageType::Emit(LineInfo* line_info) const {
1772-
LineInfoStart(line_info, this);
1773-
std::string result = absl::StrCat(package_name_, "::", type_name_);
1773+
std::string result;
1774+
if (package_name_.has_value()) {
1775+
result = absl::StrCat(package_name_.value(), "::", type_name_);
1776+
} else {
1777+
result = type_name_;
1778+
}
17741779
LineInfoEnd(line_info, this);
17751780
return result;
17761781
}

‎xls/codegen/vast/vast.h‎

Lines changed: 45 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1143,16 +1143,49 @@ class TemplateInstantiation final : public Instantiation {
11431143
std::string template_text_;
11441144
};
11451145

1146-
// Represents a reference to an already-defined macro. For example: `MY_MACRO.
1146+
// Represents a reference to an already-defined macro. Examples:
1147+
//
1148+
// `MY_MACRO // Arguments not given.
1149+
// `MY_MACRO(arg1, arg2) // Two argments.
1150+
// `MY_MACRO() // Arguments given, but empty.
11471151
class MacroRef final : public Expression {
11481152
public:
11491153
MacroRef(std::string_view name, VerilogFile* file, const SourceInfo& loc)
11501154
: Expression(file, loc), name_(name) {}
1155+
MacroRef(std::string_view name, absl::Span<Expression* const> args,
1156+
VerilogFile* file, const SourceInfo& loc)
1157+
: Expression(file, loc),
1158+
name_(name),
1159+
args_(std::vector<Expression*>(args.begin(), args.end())) {}
11511160

11521161
std::string Emit(LineInfo* line_info) const final;
11531162

11541163
private:
11551164
std::string name_;
1165+
std::optional<std::vector<Expression*>> args_;
1166+
};
1167+
1168+
// A macro in a statement position. Example:
1169+
//
1170+
// `MY_MACRO;
1171+
// `MY_OTHER_MACRO()
1172+
//
1173+
// The emitted text is the member MacroRef optionally followed by a semicolon.
1174+
class MacroStatement final : public Statement {
1175+
public:
1176+
MacroStatement(MacroRef* macro_ref, bool emit_semicolon, VerilogFile* file,
1177+
const SourceInfo& loc)
1178+
: Statement(file, loc),
1179+
macro_ref_(macro_ref),
1180+
emit_semicolon_(emit_semicolon) {}
1181+
1182+
std::string Emit(LineInfo* line_info) const final {
1183+
return macro_ref_->Emit(line_info) + (emit_semicolon_ ? ";" : "");
1184+
}
1185+
1186+
private:
1187+
MacroRef* macro_ref_;
1188+
bool emit_semicolon_;
11561189
};
11571190

11581191
// Defines a module parameter. A parameter must be assigned to an expression,
@@ -1243,13 +1276,15 @@ class Typedef final : public VastNode {
12431276
Def* def_;
12441277
};
12451278

1246-
// A type that is defined in an external package, where we may not know the
1247-
// underlying bit vector count as we request in `ExternType`.
1248-
class ExternPackageType : public DataType {
1279+
// A type that is defined elsewhere including in an external package.
1280+
class ExternType : public DataType {
12491281
public:
1250-
explicit ExternPackageType(std::string_view package_name,
1251-
std::string_view type_name, VerilogFile* file,
1252-
const SourceInfo& loc)
1282+
ExternType(std::string_view type_name, VerilogFile* file,
1283+
const SourceInfo& loc)
1284+
: DataType(file, loc), type_name_(type_name) {}
1285+
// A type from a external package (e.g, `the_pkg::the_type`).
1286+
ExternType(std::string_view package_name, std::string_view type_name,
1287+
VerilogFile* file, const SourceInfo& loc)
12531288
: DataType(file, loc),
12541289
package_name_(package_name),
12551290
type_name_(type_name) {}
@@ -1270,7 +1305,7 @@ class ExternPackageType : public DataType {
12701305
bool is_signed() const final { return false; }
12711306

12721307
private:
1273-
std::string package_name_;
1308+
std::optional<std::string> package_name_;
12741309
std::string type_name_;
12751310
};
12761311

@@ -1291,19 +1326,6 @@ class TypedefType final : public UserDefinedAliasType {
12911326
Typedef* type_def_;
12921327
};
12931328

1294-
class ExternType final : public UserDefinedAliasType {
1295-
public:
1296-
explicit ExternType(DataType* bitvec_repr, std::string_view name,
1297-
VerilogFile* file, const SourceInfo& loc)
1298-
: UserDefinedAliasType(bitvec_repr, file, loc), name_(name) {}
1299-
1300-
// Just emits the name_
1301-
std::string Emit(LineInfo* line_info) const final;
1302-
1303-
private:
1304-
std::string name_;
1305-
};
1306-
13071329
// Represents the definition of a member of an enum.
13081330
class EnumMember final : public NamedTrait {
13091331
public:
@@ -2261,7 +2283,7 @@ using ModuleMember =
22612283
ModuleSection*,
22622284
// Generate loop, can effectively generate more module members
22632285
// at elaboration time
2264-
GenerateLoop*>;
2286+
GenerateLoop*, MacroStatement*>;
22652287

22662288
// Represents a generate loop construct. Example:
22672289
// ```verilog
@@ -2893,8 +2915,7 @@ class VerilogFile {
28932915
DataType* BitVectorType(int64_t bit_count, const SourceInfo& loc,
28942916
bool is_signed = false);
28952917

2896-
DataType* ExternType(DataType* punable_type, std::string_view name,
2897-
const SourceInfo& loc);
2918+
DataType* ExternType(std::string_view name, const SourceInfo& loc);
28982919

28992920
// As above, but does not produce a scalar value when the bit_count is 1.
29002921
//

‎xls/codegen/vast/vast_test.cc‎

Lines changed: 47 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -556,11 +556,8 @@ TEST_P(VastTest, ModuleWithUserDataTypes) {
556556
Module* module = f.Make<Module>(SourceInfo(), "my_module");
557557
XLS_ASSERT_OK_AND_ASSIGN(
558558
LogicRef * out_ref,
559-
module->AddOutput(
560-
"out",
561-
f.Make<ExternType>(SourceInfo(), f.BitVectorType(64, SourceInfo()),
562-
"foobar"),
563-
SourceInfo()));
559+
module->AddOutput("out", f.Make<ExternType>(SourceInfo(), "foobar"),
560+
SourceInfo()));
564561
module->Add<ContinuousAssignment>(SourceInfo(), out_ref,
565562
f.Literal(UBits(32, 64), SourceInfo()));
566563
if (UseSystemVerilog()) {
@@ -1825,25 +1822,21 @@ TEST_P(VastTest, TypeCastEmission) {
18251822
m->AddInput("a", f.BitVectorType(8, si), si));
18261823
XLS_ASSERT_OK_AND_ASSIGN(
18271824
LogicRef * out_foo,
1828-
m->AddOutput("out_foo",
1829-
f.Make<ExternType>(si, f.BitVectorType(8, si), "foobar"),
1830-
si));
1825+
m->AddOutput("out_foo", f.Make<ExternType>(si, "foobar"), si));
18311826
XLS_ASSERT_OK_AND_ASSIGN(
18321827
LogicRef * out_pkg,
1833-
m->AddOutput("out_pkg",
1834-
f.Make<ExternPackageType>(si, "my_pkg", "my_type_t"), si));
1828+
m->AddOutput("out_pkg", f.Make<ExternType>(si, "my_pkg", "my_type_t"),
1829+
si));
18351830

18361831
// assign out_foo = foobar'(a + 1);
18371832
m->Add<ContinuousAssignment>(
18381833
si, out_foo,
1839-
f.Make<TypeCast>(si,
1840-
f.Make<ExternType>(si, f.BitVectorType(8, si), "foobar"),
1834+
f.Make<TypeCast>(si, f.Make<ExternType>(si, "foobar"),
18411835
f.Add(a, f.PlainLiteral(1, si), si)));
18421836
// assign out_pkg = my_pkg::my_type_t'(a);
18431837
m->Add<ContinuousAssignment>(
18441838
si, out_pkg,
1845-
f.Make<TypeCast>(si, f.Make<ExternPackageType>(si, "my_pkg", "my_type_t"),
1846-
a));
1839+
f.Make<TypeCast>(si, f.Make<ExternType>(si, "my_pkg", "my_type_t"), a));
18471840

18481841
EXPECT_EQ(m->Emit(nullptr),
18491842
R"(module top(
@@ -2673,7 +2666,7 @@ TEST_P(VastTest, EnumAssignment) {
26732666
enum_type->AddMember("RED", f.PlainLiteral(0, si), si);
26742667

26752668
// Note that this is an externally defined type.
2676-
DataType* extern_enum_type = f.ExternType(enum_type, "color_e", si);
2669+
DataType* extern_enum_type = f.ExternType("color_e", si);
26772670

26782671
XLS_ASSERT_OK_AND_ASSIGN(
26792672
LogicRef * signal, m->AddWire("signal", extern_enum_type, SourceInfo()));
@@ -2699,7 +2692,7 @@ TEST_P(VastTest, ExternTypePort) {
26992692
enum_type->AddMember("RED", f.PlainLiteral(0, si), si);
27002693

27012694
// Note that this is an externally defined type.
2702-
DataType* extern_enum_type = f.ExternType(enum_type, "color_e", si);
2695+
DataType* extern_enum_type = f.ExternType("color_e", si);
27032696

27042697
// Declare a port of the extern type.
27052698
XLS_ASSERT_OK_AND_ASSIGN(LogicRef * input,
@@ -2729,7 +2722,7 @@ TEST_P(VastTest, ExternalPackageTypePort) {
27292722
Module* m = f.AddModule("top", si);
27302723

27312724
// Make an extern package type to use in the `input` construction.
2732-
auto* data_type = f.Make<ExternPackageType>(si, "mypack", "mystruct_t");
2725+
auto* data_type = f.Make<ExternType>(si, "mypack", "mystruct_t");
27332726

27342727
XLS_ASSERT_OK_AND_ASSIGN(LogicRef * input,
27352728
m->AddInput("my_input", data_type, si));
@@ -2753,7 +2746,7 @@ TEST_P(VastTest, ExternalPackageTypePackedArrayPort) {
27532746
Module* m = f.AddModule("top", si);
27542747

27552748
// Make an extern package type to use in the `input` construction.
2756-
auto* data_type = f.Make<ExternPackageType>(si, "mypack", "mystruct_t");
2749+
auto* data_type = f.Make<ExternType>(si, "mypack", "mystruct_t");
27572750
const std::vector<int64_t> packed_dims = {2, 3, 4};
27582751
const bool dims_are_max = false;
27592752
auto* packed_array =
@@ -2943,6 +2936,42 @@ TEST_P(VastTest, ModuleParameterPortsWithIo) {
29432936
endmodule)");
29442937
}
29452938

2939+
TEST_P(VastTest, MacroStatements) {
2940+
VerilogFile f(GetFileType());
2941+
Module* m = f.AddModule("top", SourceInfo());
2942+
XLS_ASSERT_OK_AND_ASSIGN(
2943+
LogicRef * a,
2944+
m->AddInput("a", f.BitVectorType(8, SourceInfo()), SourceInfo()));
2945+
XLS_ASSERT_OK_AND_ASSIGN(
2946+
LogicRef * b,
2947+
m->AddInput("b", f.BitVectorType(8, SourceInfo()), SourceInfo()));
2948+
2949+
m->Add<MacroStatement>(SourceInfo(),
2950+
f.Make<MacroRef>(SourceInfo(), "MY_MACRO1"),
2951+
/*emit_semicolon=*/true);
2952+
m->Add<MacroStatement>(
2953+
SourceInfo(),
2954+
f.Make<MacroRef>(SourceInfo(), "MY_MACRO2", std::vector<Expression*>{}),
2955+
/*emit_semicolon=*/false);
2956+
m->Add<MacroStatement>(
2957+
SourceInfo(),
2958+
f.Make<MacroRef>(SourceInfo(), "MY_MACRO3", std::vector<Expression*>{a}),
2959+
/*emit_semicolon=*/false);
2960+
m->Add<MacroStatement>(SourceInfo(),
2961+
f.Make<MacroRef>(SourceInfo(), "MY_MACRO4",
2962+
std::vector<Expression*>{a, b}),
2963+
/*emit_semicolon=*/true);
2964+
EXPECT_EQ(m->Emit(nullptr), R"(module top(
2965+
input wire [7:0] a,
2966+
input wire [7:0] b
2967+
);
2968+
`MY_MACRO1;
2969+
`MY_MACRO2()
2970+
`MY_MACRO3(a)
2971+
`MY_MACRO4(a, b);
2972+
endmodule)");
2973+
}
2974+
29462975
INSTANTIATE_TEST_SUITE_P(VastTestInstantiation, VastTest,
29472976
testing::Values(false, true),
29482977
[](const testing::TestParamInfo<bool>& info) {

‎xls/public/c_api_symbols.txt‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -360,6 +360,7 @@ xls_vast_localparam_ref_as_expression
360360
xls_vast_logic_ref_as_expression
361361
xls_vast_logic_ref_as_indexable_expression
362362
xls_vast_logic_ref_get_name
363+
xls_vast_macro_ref_as_expression
363364
xls_vast_make_verilog_file
364365
xls_vast_parameter_ref_as_expression
365366
xls_vast_slice_as_expression
@@ -370,6 +371,8 @@ xls_vast_statement_block_add_comment_text
370371
xls_vast_statement_block_add_conditional
371372
xls_vast_statement_block_add_inline_text
372373
xls_vast_statement_block_add_nonblocking_assignment
374+
xls_vast_verilog_file_add_blank_line
375+
xls_vast_verilog_file_add_comment
373376
xls_vast_verilog_file_add_include
374377
xls_vast_verilog_file_add_module
375378
xls_vast_verilog_file_emit
@@ -384,6 +387,7 @@ xls_vast_verilog_file_make_concat
384387
xls_vast_verilog_file_make_continuous_assignment
385388
xls_vast_verilog_file_make_def
386389
xls_vast_verilog_file_make_extern_package_type
390+
xls_vast_verilog_file_make_extern_type
387391
xls_vast_verilog_file_make_index
388392
xls_vast_verilog_file_make_index_i64
389393
xls_vast_verilog_file_make_inline_verilog_statement
@@ -393,6 +397,9 @@ xls_vast_verilog_file_make_int_type
393397
xls_vast_verilog_file_make_integer_def
394398
xls_vast_verilog_file_make_integer_type
395399
xls_vast_verilog_file_make_literal
400+
xls_vast_verilog_file_make_macro_ref
401+
xls_vast_verilog_file_make_macro_ref_with_args
402+
xls_vast_verilog_file_make_macro_statement
396403
xls_vast_verilog_file_make_nonblocking_assignment
397404
xls_vast_verilog_file_make_packed_array_type
398405
xls_vast_verilog_file_make_plain_literal
@@ -425,6 +432,7 @@ xls_vast_verilog_module_add_member_comment
425432
xls_vast_verilog_module_add_member_continuous_assignment
426433
xls_vast_verilog_module_add_member_inline_statement
427434
xls_vast_verilog_module_add_member_instantiation
435+
xls_vast_verilog_module_add_member_macro_statement
428436
xls_vast_verilog_module_add_output
429437
xls_vast_verilog_module_add_parameter
430438
xls_vast_verilog_module_add_parameter_port
@@ -437,4 +445,4 @@ xls_vast_verilog_module_get_name
437445
xls_vast_verilog_module_get_ports
438446
xls_vast_verilog_module_port_get_def
439447
xls_vast_verilog_module_port_get_direction
440-
xls_verify_package
448+
xls_verify_package

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