"screen shiufting" or "frame shifting" in Pipeline MIPI CSI camera → ESP32-P4 → RGB888 LCD (IDFGH-17001)

[DenisLiakh]

Hello everyone!

I'm developing a video pipeline: MIPI CSI camera → ESP32-P4 → RGB888 LCD, with the goal of achieving at least 30 FPS (both the camera and display are capable of 60 FPS).

Currently, I have fixed hardware components—I cannot change either the camera or the display. Unfortunately, the LCD operates in "DE-only" mode and does not provide VSYNC.

The main issue I'm facing is "frame shifting": the image on the screen continuously drifts horizontally and vertically in a cyclic manner, as shown in the picture below.

The higher the PCLK frequency, the faster this shifting occurs.

My current video streaming pipeline uses double buffering and works as follows:

Camera buffer (MIPI CSI)
↓ (Color conversion: YUV422 → RGB888)
Two intermediate buffers for color conversion
↓ (PPA scaling)
Two frame buffers for display output
All processing fits within the 30 FPS target, but the visible frame shifting makes the result unusable.

As a test, I reconfigured the system to display only a static image—bypassing the camera, color conversion, and PPA scaling—using just the LCD driver. This reduced the shifting speed but did not eliminate the problem.

My question is:
Is there any way to fix this issue without switching to an MIPI DSI display?
Or could there be some considerations I’ve missed?

[suda-morris]

Can you try enable the CONFIG_SPIRAM_XIP_FROM_PSRAM? And what's the LCD pixel clock frequency?

[DenisLiakh]

I tried CONFIG_SPIRAM_XIP_FROM_PSRAM, but the effect was insignificant. As timing parameters, I used the standard VESA timings recommended by the display manufacturer. For 30 FPS, I only changed the PCLK to 32 MHz.

[suda-morris]

also please make sure the PSRAM frequency is set to at least 200MHz: CONFIG_SPIRAM_SPEED_200M=y.

PS: try the master branch for now, the PSRAM frequency is already 200MHz by default.

[DenisLiakh]

I have alredy set it