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dt-bindings: soc: adi: Add SC5XX SoC component bindings
 Document device tree bindings for ADI SC5XX SoC components including PADS config, reset controller, system event controller, trigger routing unit, and RPMSG support. Signed-off-by: Arturs Artamonovs <[email protected]>
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‎Documentation/devicetree/bindings/soc/adi/adi,pads-system-config.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/adi/adi,pads-system-config.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices PADS-related system config for SC5XX processor family
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maintainers:
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- Arturs Artamonovs <[email protected]>
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- Utsav Agarwal <[email protected]>
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description:
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Allows other drivers to control the PADS-related system config register.
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This register ties into many drivers and adds silicon controls for items
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like voltage selection and endian selection.
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properties:
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compatible:
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enum:
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- adi,pads-system-config
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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bus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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pads_system_config: adi-control@31004600 {
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compatible = "adi,pads-system-config";
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reg = <0x31004600 0x100>;
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};
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};
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emac0: ethernet@31040000 {
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reg = <0x31040000 0x2000>;
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adi,system-config = <&pads_system_config>;
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};

‎Documentation/devicetree/bindings/soc/adi/adi,reset-controller.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/adi/adi,reset-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices Reset Controller for SC5XX processor family
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maintainers:
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- Arturs Artamonovs <[email protected]>
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- Utsav Agarwal <[email protected]>
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description:
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SHARC and ARM core reset control unit for starting/stopping/resetting
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processors
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properties:
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compatible:
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enum:
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- adi,reset-controller
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reg:
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maxItems: 1
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adi,sharc-min:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Minimum valid SHARC core ID/count
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minimum: 0
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adi,sharc-max:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Maximum valid SHARC core ID/count
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maximum: 2
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required:
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- compatible
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- reg
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- adi,sharc-min
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- adi,sharc-max
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additionalProperties: false
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examples:
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- |
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rcu: rcu@3108c000 {
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compatible = "adi,reset-controller";
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reg = <0x3108c000 0x1000>;
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adi,sharc-min = <1>;
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adi,sharc-max = <2>;
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};

‎Documentation/devicetree/bindings/soc/adi/adi,rpmsg-SC598.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/adi/adi,rpmsg-SC598.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices RPMSG Driver for SC5XX processor family
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maintainers:
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- Arturs Artamonovs <[email protected]>
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- Utsav Agarwal <[email protected]>
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description: |
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Describes device tree binding for adi rpmsg driver
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required when rpmsg communication is needed and remote core isn't
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started by adi,remoteproc.
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The size of vdev-vring specifies how many message buffers are allocated
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for tx and rx (combined) overriding the default number specified in
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MAX_RPMSG_NUM_BUFS. The memory-region size must match (or be larger) selected
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number of messages times MAX_RPMSG_BUF_SIZE (default 512).
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E.g. for 1024 message buffers (512 for rx and 512 for tx):
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vdev-vring size = 0x0000a000
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memory-region size = 0x00080000
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Selection table for MAX_RPMSG_BUF_SIZE=512 (default):
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rpmsg | |
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buffers | vdev-vring | memory-region
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---------------------------------
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256 | 0x00004000 | 0x00020000
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512 | 0x00006000 | 0x00040000
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1024 | 0x0000a000 | 0x00080000
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2048 | 0x00010000 | 0x00100000
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4096 | 0x0001e000 | 0x00200000
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8192 | 0x00038000 | 0x00400000
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16384 | 0x0006c000 | 0x00800000
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32768 | 0x000d4000 | 0x01000000
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65536 | 0x001a4000 | 0x02000000
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131072 | 0x00344000 | 0x04000000
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262144 | 0x00684000 | 0x08000000
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524288 | 0x00d04000 | 0x10000000
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1048576 | 0x01a04000 | 0x20000000
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2097152 | 0x03404000 | 0x40000000
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properties:
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compatible:
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enum:
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- adi,rpmsg-SC598
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reg:
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maxItems: 1
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core-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: SHARC core number
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adi,rcu:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to Remote Control Unit
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adi,rsc-table:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to resource table memory region shared with SHARC core
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adi,tru:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to Trigger Routing Unit for ICC interrupts
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interrupts:
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maxItems: 1
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description: ICC interrupt for rpmsg communication
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adi,tru-master-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: ICC interrupt number to notify remote core
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vdev-vring:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: |
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phandle to reserved memory region for rpmsg vdev0vrings,
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if not specified allocates buffer from DMA pool.
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memory-region:
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maxItems: 1
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description: |
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phandle to reserved memory for rpmsg message buffers,
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if not specified allocates buffer from DMA pool.
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required:
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- compatible
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- core-id
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- adi,rcu
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- adi,rsc-table
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- adi,tru
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- interrupts
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- adi,tru-master-id
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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vdev0vrings: vdev0vring0@20080000 {
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reg = <0x20080000 0x4000>;
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no-map;
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};
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vdev0buffer: vdev0buffer@20084000 {
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compatible = "shared-dma-pool";
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reg = <0x20084000 0x20000>;
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no-map;
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};
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};
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rcu: rcu@3108c000 {
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compatible = "adi,reset-controller";
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reg = <0x3108c000 0x1000>;
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adi,sharc-min = <1>;
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adi,sharc-max = <2>;
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};
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tru: tru@3108a000 {
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compatible = "adi,trigger-routing-unit";
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reg = <0x3108a000 0x1000>;
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adi,max-master-id = <182>;
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adi,max-slave-id = <187>;
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};
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rsc_tbl0: rsc-tbl@20081000 {
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reg = <0x20081000 0x1000>;
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};
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core0-rpmsg@28240000 {
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compatible = "adi,rpmsg-SC598";
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reg = <0x28240000 0x1000>;
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core-id = <1>;
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adi,rcu = <&rcu>;
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adi,rsc-table = <&rsc_tbl0>;
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interrupts = <GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
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adi,tru = <&tru>;
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adi,tru-master-id = <135>;
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vdev-vring = <&vdev0vrings>;
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memory-region = <&vdev0buffer>;
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};

‎Documentation/devicetree/bindings/soc/adi/adi,system-event-controller.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/adi/adi,system-event-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices System Event Controller for SC5XX processor family
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maintainers:
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- Arturs Artamonovs <[email protected]>
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- Utsav Agarwal <[email protected]>
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description:
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This is the interrupt controller for the SHARC cores on the SC5XX family.
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properties:
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compatible:
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enum:
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- adi,system-event-controller
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reg:
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maxItems: 1
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adi,rcu:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Associated reset control unit
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adi,sharc-cores:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Number of SHARC cores available
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required:
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- compatible
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- reg
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- adi,rcu
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- adi,sharc-cores
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additionalProperties: false
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examples:
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- |
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sec: sec@31089000 {
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compatible = "adi,system-event-controller";
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reg = <0x31089000 0x1000>;
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adi,rcu = <&rcu>;
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adi,sharc-cores = <2>;
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};

‎Documentation/devicetree/bindings/soc/adi/adi,trigger-routing-unit.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/adi/adi,trigger-routing-unit.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices Trigger Routing Unit for SC5XX processor family
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maintainers:
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- Arturs Artamonovs <[email protected]>
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- Utsav Agarwal <[email protected]>
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description:
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Used for ICC between SHARC and ARM cores.
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The TRU provides system-level sequence control without core intervention.
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The TRU maps trigger masters (generators of triggers) to trigger slaves
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(receivers of triggers). Slave endpoints can be configured to respond to
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triggers in various ways. Multiple TRUs may be provided in a
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multiprocessor system to create a trigger network. Common applications
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enabled by the TRU include
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properties:
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compatible:
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enum:
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- adi,trigger-routing-unit
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reg:
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maxItems: 1
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adi,max-master-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Max Trigger Master ID
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maximum: 1024
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adi,max-slave-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Max Trigger Slave ID
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maximum: 1024
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patternProperties:
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"^channel-[0-9]+$":
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description: Trigger Routing Channel to Map Master/Slave
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type: object
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properties:
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adi,tru-master-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Trigger Routing Master ID
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adi,tru-slave-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Trigger Routing Slave ID
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required:
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- adi,tru-master-id
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- adi,tru-slave-id
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additionalProperties: false
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required:
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- compatible
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- reg
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- adi,max-master-id
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- adi,max-slave-id
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additionalProperties: false
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examples:
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- |
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tru: tru@3108a000 {
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compatible = "adi,trigger-routing-unit";
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reg = <0x3108a000 0x1000>;
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adi,max-master-id = <182>;
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adi,max-slave-id = <187>;
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rpmsg_to_a55: channel-0 {
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adi,tru-master-id = <134>; /* trigger master SOFT3 */
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adi,tru-slave-id = <160>; /* TRU0_IRQ3 */
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};
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rpmsg_to_sharc0: channel-1 {
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adi,tru-master-id = <135>; /* trigger master SOFT4 */
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adi,tru-slave-id = <164>; /* TRU0_IRQ7 */
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};
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rpmsg_to_sharc1: channel-2 {
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adi,tru-master-id = <136>; /* trigger master SOFT5 */
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adi,tru-slave-id = <168>; /* TRU0_IRQ11 */
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};
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};

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