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Design UART communication module #2

@TheDeepestSpace

Description

@TheDeepestSpace

We need to somehow communicate with our core from the outside; UART seems like the most natural choice for a TTO design. We will need at least the following functionality:

  • write data into the memory of the core
  • read data from the the memory of the core
  • gather metadata on the state of the core (this is tentative, but ideally we would want to be able to get some debugging info in case the cpu gets stuck or outputs incorrect data)

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