CogVM source as per VMMaker.oscog-eem.3708

Simplify the high bit implementation in advance of implementing
instantiating 64-bit large integer results on 32-bit platforms
(itself a precursor for integrating Hernán's live typing work).

Add XorCq:R:. On IA32 use the same computeSizeOfArithCqR/
concretizeArithCqRWithRO:eaxOpcode: scheme for CqR ops as
X64 in computeMaximumSize/dispatchConcretize.

Author: eliotmiranda

src/spur32.cog.lowcode/cogit.h

@@ -1,6 +1,6 @@
 /* Automatically generated by
-	CCodeGenerator VMMaker.oscog-eem.3703 uuid: 85364028-fc2e-4da5-88f8-910243509f86
-	(Cog-eem.504, Compiler-eem.526)
+	CCodeGenerator VMMaker.oscog-eem.3708 uuid: d1d43de6-5ba0-4455-beb1-9453dc974144
+	(Cog-eem.507, Compiler-eem.527)
  */
 
 

src/spur32.cog.lowcode/cogitARMv5.c

@@ -1,10 +1,10 @@
 /* Automatically generated by
-	CCodeGenerator VMMaker.oscog-eem.3703 uuid: 85364028-fc2e-4da5-88f8-910243509f86
-	(Cog-eem.504, Compiler-eem.526)
+	CCodeGenerator VMMaker.oscog-eem.3707 uuid: 3a1e2973-7850-4efc-b8a6-1e64764914a4
+	(Cog-eem.507, * Compiler-eem.526)
    from
-	StackToRegisterMappingCogit VMMaker.oscog-eem.3703 uuid: 85364028-fc2e-4da5-88f8-910243509f86
+	StackToRegisterMappingCogit VMMaker.oscog-eem.3707 uuid: 3a1e2973-7850-4efc-b8a6-1e64764914a4
  */
-static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.3703 uuid: 85364028-fc2e-4da5-88f8-910243509f86 " __DATE__ ;
+static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.3707 uuid: 3a1e2973-7850-4efc-b8a6-1e64764914a4 " __DATE__ ;
 char *__cogitBuildInfo = __buildInfo;
 
 
@@ -19510,13 +19510,12 @@ genPrimitiveGreaterThan(void)
 }
 
 
-/*	Implementation notes: there are two reasons to use TempReg
-	-1) if primitive fails, ReceiverResultReg must remain unchanged (we
-	CompletePrimitive) -2) CLZ/BSR only work on 64bits for registers R0-R7 on
-	Intel X64. But Win64 uses R9
-	Normally, this should be backEnd dependent, but for now we have a single
-	64bits target...
- */
+/*	Defer to the backEnd to generate the best instruction sequence.
+	Some backends have an efficient count-leading-zeros that must
+	be inverted to produce the high bit, others have a genuine high
+	bit. Intel has both, the former only in newer revisions.
+	Use TempReg. If primitive fails, ReceiverResultReg must remain
+	unchanged (we CompletePrimitive) */
 
 	/* CogObjectRepresentation>>#genPrimitiveHighBit */
 static sqInt
@@ -19525,40 +19524,30 @@ genPrimitiveHighBit(void)
     AbstractInstruction *anInstruction;
     AbstractInstruction *jumpNegativeReceiver;
 
+	/* begin CmpCq:R: */
+	/* begin gen:quickConstant:operand: */
+	anInstruction = genoperandoperand(CmpCqR, 0, ReceiverResultReg);
+	if (usesOutOfLineLiteral(anInstruction)) {
+		(anInstruction->dependent = locateLiteral(0));
+	}
+	jumpNegativeReceiver = genConditionalBranchoperand(JumpLess, ((sqInt)0));
 
 	/* remove excess tag bits from the receiver oop */
-	/* and use the abstract cogit facility for case of single tag-bit */
 	backEnd;
 
-	/* begin genHighBitIn:ofSmallIntegerOopWithSingleTagBit: */
-	/* begin genHighBitClzIn:ofSmallIntegerOopWithSingleTagBit: */
+	/* begin genHighBitOfNonZeroReg:into: */
+
 	/* ClzR:R: */
 	genoperandoperand(ClzRR, ReceiverResultReg, TempReg);
-	if (!(setsConditionCodesFor(lastOpcode(), JumpZero))) {
-		/* begin CmpCq:R: */
-		/* begin gen:quickConstant:operand: */
-		anInstruction = genoperandoperand(CmpCqR, 0, TempReg);
-		if (usesOutOfLineLiteral(anInstruction)) {
-			(anInstruction->dependent = locateLiteral(0));
-		}
-	}
-	jumpNegativeReceiver = genConditionalBranchoperand(JumpZero, ((sqInt)0));
 
-	/* Note the nice bit trick below:
+	/* Invert leading zeroas into highBit.
+	   Note the nice bit trick below:
 	   highBit_1based_of_small_int_value = (BytesPerWord * 8) - leadingZeroCout_of_oop - 1 toAccountForTagBit.
 	   This is like 2 complements (- reg - 1) on (BytesPerWord * 8) log2 bits, or exactly a bit invert operation... */
 
-	/* #XorCw:R: #gen:literal:operand: */
-	checkLiteralforInstruction((BytesPerWord * 8) - 1, genoperandoperand(XorCwR, (BytesPerWord * 8) - 1, TempReg));
-
-	/* Jump is NULL if above operation is not implemented, else return the result */
-	if (!jumpNegativeReceiver) {
-		return UnimplementedPrimitive;
-	}
-
-	/* MoveR:R: */
-	genoperandoperand(MoveRR, TempReg, ReceiverResultReg);
-	genConvertIntegerToSmallIntegerInReg(ReceiverResultReg);
+	/* #XorCq:R: #gen:literal:operand: */
+	checkLiteralforInstruction((BytesPerWord * 8) - 1, genoperandoperand(XorCqR, (BytesPerWord * 8) - 1, TempReg));
+	genConvertIntegerInRegtoSmallIntegerInReg(TempReg, ReceiverResultReg);
 
 	/* genPrimReturn */
 	if (methodOrBlockNumArgs <= (numRegArgs())) {