Support for ASUS Pro WS X299 SAGE II (and maybe all other i200 Chipset Series motherboards)

[TheDatadrainer]

Following the previous discussion started on LibreHardwareMonitor Github issue #1622 about supporting the reading of SMBus DRAM information with an Intel X299 chipset.
For now RAMSPDToolkit using the test console tool is not able to detect the RAM modules.
@DavidTobar456 was thinking of a probable multiplexing on top of the SMBus to allow access to the eight possible DDR4 modules.
I, of course, volunteer to help in debugging and testing.
Thank you so much for taking the time to work on all of this.

EDIT:
I found the datasheets for the Intel 200 Chipset Famillyare freely available on the Intel website:

• Volume 1
• Volume 2

[Blacktempel]

Thank you @DavidTobar456 for the assistance so far.
I have not had time to check in detail yet, but your messages make sense, though it does seem like a complicated topic in this case.

@TheDatadrainer the current implementation works for 8 modules (see first and last address range) but this seems special.

[Blacktempel]

@TheDatadrainer could you check if it works with SIV (System Information Viewer) ?
Please also post screenshots if its showing, if possible.

When you start it, the RAM should show somewhere top right ("DIMMs").
You can also check the menu[s]:

• SPD -> DIMMs
• SPD -> DIMM Status
• SPD -> DIMM Status -> click on SMBus SPD

Screenshots of all would be great.
You can remove personal details, if anything is showing (like PC name or user name).

[TheDatadrainer]

WOW What an impressive tool this SIV! I didn't know about it but it surpasses everything I know by the amount of information it gives.
Here are the screenshots you asked.

DIMMs:

DIMM Status:

SMB Bus:

And finally SPD Details:

From what I can see, there are three SMB buses directly managed by the CPU, additionally to the X299??? With A and B exclusively used for the RAM and C unused.
And for the X299 the controllers at addresses 0x44, 0x61 and 0x6A where detected by RAMSPDToolkit but not at 0x69. But there was something at 0x08 and SIV do not show anything there.

EDIT:
Here are the datasheets for the Intel LGA 2066 CPUs

• Volume 1
• Volume 2

If the signals are multiplexed, there should be some de-multiplexer ICs somewhere near the RAM, am I right? That is something I can take a look at.

[Blacktempel]

SIV can do a lot, yes :)

Thank you for the screenshots. I may have a solution, give me a little bit to write some code and I'll get one for you to test.

I think it should work with both WinRing0 and PawnIO without adjustments. I'll have to check.

Worst case we have to test it with WinRing0 and then implement changes for PawnIO Modules.

[TheDatadrainer]

It is possible to directly read the temperatures for what I see from SIV and the CPU documentation.
Is that what you will do? Or will it require more work than sending the good signals to get the temperature. I ask that because the other problem with the motherboard is that the modules are not detected by any open source software I use. All are the build on top of LHM library or using its code in some way. So it would be great to have the full SMBus "features" available if possible, providing it requires not too much work of course. Allowing RGB lighting to work too for instance. That is not mandatory, but would be really nice as I would like in the future to use RGB to color each RAM module depending on the temperature.

I'm ready for testing whenever you want :) Thank you very much.

ps. It is true that the idea of ​​PawnIO is to expose only what is necessary and therefore to directly implement the communication code. I hope it already includes the required code.

[Blacktempel]

If the solution is what I believe, the CPU documentation is not necessary at all. We can just use existing SMBus implementations.

If the test works as expected, I will implement it properly and push the changes. You can then take a look at the code.

Changing e.g. OpenRGB to also support it should be equally complex (or easy), so they then would also support all of your RAMs.
I will now start getting test code ready, should not take too long - I assume <1h to just throw something basic together.

ps. It is true that the idea of ​​PawnIO is to expose only what is necessary and therefore to directly implement the communication code. I hope it already includes the required code.

I believe that is the idea of PawnIO, yes.

[Blacktempel]

Please upload log file from this test version.

Caution

This is ONLY for your Intel DDR4 (!) system, the one you have posted logs and screenshots of.

https://drive.google.com/file/d/1M0dFvAmOJkaMf_xkorU7PQNQq0AHAkO0/view?usp=sharing

OpenHashTab

20260103_1410_GithubTest_RST_7_Debug-PawnIO.7z	MD5	130DEF15B8E4BA5ADD041F60C69517A3
20260103_1410_GithubTest_RST_7_Debug-PawnIO.7z	SHA-1	E52996740697A7992AAFECD104D5D6BE825982E7
20260103_1410_GithubTest_RST_7_Debug-PawnIO.7z	SHA-256	FAAEB3E5319CA0EC579230E5F8850263372FA98F587A898D3A266AB5B6B5647F
20260103_1410_GithubTest_RST_7_Debug-PawnIO.7z	SHA-512	6D0D88882E1AB427AC1459498FDC0BFEBBA2D125B01B6F51A1247E23B7E733D5B26B24E17755AACC7B85F7F9C8E9BA78A45A0F5B2875DB8E2996F319D84CF6E2
20260103_1410_GithubTest_RST_7_Debug-PawnIO.7z	SHA3-512	233DCDA0557764714899BBF3A7A93E673BFF3B8EFE0F30A193E7A528BE3F6CABCFC49A985C02B755D6929B7C72353A89683C3B38B44A2D13D46B54054464EEFB

[TheDatadrainer]

Here is the log : Log.txt

[Blacktempel]

Ohhhhhhh no.
One minute, I had a check for the WinRing0 SMBus, not the PawnIO, sorry about that.
Was trying to limit access to only the specific SMBus we need.

[TheDatadrainer]

Ohhhhhhh no. One minute, I had a check for the WinRing0 SMBus, not the PawnIO, sorry about that. Was trying to limit access to only the specific SMBus we need.

No problem :) As soon as PawnIO is mature enough, there will be no more need for WR0.

[Blacktempel]

There you go:
https://drive.google.com/file/d/13dkGnZZp0YvOauEiloHbJuMDQwV5Dh8O/view?usp=sharing

OpenHashTab

20260103_1430_GithubTest_RST_7_Debug-PawnIO.7z	MD5	9229B1C4810804B5C0AB2B8F9784C0D8
20260103_1430_GithubTest_RST_7_Debug-PawnIO.7z	SHA-1	CBBFF2FCCDEE3BBED9A20D246EDD89EBA7A0ED05
20260103_1430_GithubTest_RST_7_Debug-PawnIO.7z	SHA-256	F61AAB0FB2219C1233D590C15F3E9B24DE9879B991FC1B8BDA2A5DEA332384A2
20260103_1430_GithubTest_RST_7_Debug-PawnIO.7z	SHA-512	D0CA3A1B5F71757EB7F0F9EE37E8BC727B0E802BD3BA4BEBD5F6BF499D6A317BD7F2BDE4D50D7C450772986C05A6051E2EBEEE15BC3B08AE83289CBE4D77A066
20260103_1430_GithubTest_RST_7_Debug-PawnIO.7z	SHA3-512	249C5B4F28982580872E9821CF5FA5ED1D11C156136EBC0F08603861006B2300C01A074B297989A24C3B27EAB4B9CAFE3068E2E3FE201298E7608C8C633C9575

[TheDatadrainer]

Here Log.txt

[Blacktempel]

Thanks, I will check what needs to be changed. Something is not working with current implementation.