Restrictions on MSR instruction not implemented correctly in FVP for R52

[adamlewisWHIS]

On Windows 10, using FVP for R52 v11.27.19
While in Hyp mode, the instruction:
MSR LR_usr, R1 (encoded as 0xE126F201 according to my memory view)
should result in an Undef abort, because section F5.2.2 of ARM DDI 0487I.a claims that R8_usr-R12_usr, SP_hyp, LR_usr, and SPSR_hyp are all restricted while in Hyp mode.
Instead, it is executed successfully.

Unsure if this is the right place to report the issue :)

[jkrech]

Hi @adamlewisWHIS, I am trying to find out where you could best log this observation. It would be quite helpful to know the origin of the R52 FVP. I do e.g. see that two R52 FVP models are shipped as part of Arm Development Studio?

Note that you are referring to a Cortex-R52 above, however you are referencing the document
Arm Architecture Reference Manual for A-profile architecture
This means you are comparing the Arm-R profile FVP with the Arm-A profile architecture reference manual.

In any case this is not the right repository to raise this issue/question.