CodeGen and Refactoring #1425
merkeljordan
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It is mentioned as a potential use case, yes. There are no refactoring tools available in the repo -- you'd have to build the specific refactoring logic you want on top of what slang provides, which is a way to read in and parse Verilog and then write it back out again after you've modified the syntax tree. |
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Hello,
I saw on the website that there is mention of verilog refactoring and writing back to Verilog. What kind of refactors are currently in place?
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